Closing a Chip-Blocking Equivalence Problem to 0 NEQ

How I root-caused a hierarchical LEC failure everyone else had given up on, and shipped a FULL-EQ verdict with zero manual pin-constraints.

Every chip has one sign-off blocker that outlasts everyone who first touched it. On this project, it was a hierarchical Conformal LEC (RTL-vs-netlist logical equivalence check) run against a large, already-frozen netlist. By the time it landed on my desk, it had already been escalated, deprioritized, and quietly carried forward across two tape-out cycles as a "known issue."

The standard move at that point is to add manual pin-constraints until the tool stops complaining, ship a PARTIAL-EQ verdict, and move on. Chiptop sign-off doesn't actually require FULL-EQ in every case — a well-justified PARTIAL-EQ with documented waivers is an accepted outcome. But accepting that meant accepting we didn't actually know whether the netlist matched the RTL in the parts nobody had proven equivalent. I wanted a real answer, not a paperwork answer.

This is the case study on how that investigation actually went — including the two dead ends that looked like real bugs and weren't.